METHOD FOR FORMING SILICON NITRIDE FILM SELECTIVELY ON SIDEWALLS OR FLAT SURFACES OF TRENCHES

• Main Authors: EBISUDANI TAISHI, ISHIKAWA MASARU, FUKAZAWA ATSUTAKE, CHUN SEUNG JU, UEDA SHINYA, SHIBA EIICHIRO, KIM SEYON, CHOI JONG WAN, MIN YOON KI, YOO YONG MIN
• Format: Patent
• Language: English; Japanese
• Published: 29.11.2018
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OFNEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMICBEAMS; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a method for fabricating a layer structure in a trench.SOLUTION: A method for fabricating a layer structure in a trench comprises the steps of: simultaneously forming a dielectric film containing a Si-N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying a voltage between two electrodes between which the substrate is placed in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.SELECTED DRAWING: Figure 2 【課題】トレンチに層構造を製造する方法を提供する。【解決手段】トレンチに層構造を製造する方法は、上面並びにトレンチの底面及び側壁上にＳｉ−Ｎ結合を含む誘電体膜を同時に形成するステップであって、上面及び底面上に形成される膜の上部／底部と、側壁上に形成される膜の側壁部とは、２つの電極間に電圧を印加することによって励起されたプラズマの衝突によって異なる化学物質耐性を付与され、基板は、２つの電極間に２つの電極と平行に置かれる、ステップと、異なる化学物質耐性に応じて膜の上部／底部及び側壁部の一方を他方よりも圧倒的に除去するエッチングによって、膜の上部／底部及び側壁部の両方ではなくいずれか一方を実質的に除去するステップと、を含む。【選択図】図２