MONITORING CIRCUIT

PROBLEM TO BE SOLVED: To provide a monitoring circuit enabling a semiconductor device subjected to monitoring to identify, by itself, a reset reason.SOLUTION: A monitoring circuit 100 includes: a first abnormality detecting circuit 110, a second abnormality detecting circuit 111, a reset output circ...

Full description

Saved in:
Bibliographic Details
Main Author SAKAGUCHI KAORU
Format Patent
LanguageEnglish
Japanese
Published 18.10.2018
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PROBLEM TO BE SOLVED: To provide a monitoring circuit enabling a semiconductor device subjected to monitoring to identify, by itself, a reset reason.SOLUTION: A monitoring circuit 100 includes: a first abnormality detecting circuit 110, a second abnormality detecting circuit 111, a reset output circuit 112, and an output holding circuit 113. An output of the first abnormality detecting circuit is connected to both the reset output circuit and the output holding circuit via a first abnormality detection signal line DT1. An output of the second abnormality detecting circuit is connected to both the reset output circuit and the output holding circuit via a second abnormality detection signal line DT2. The reset output circuit outputs a reset signal on the basis of a logical add of a first abnormality detection signal and a second abnormality detection circuit. When the abnormality detection signal is input from the first abnormality detection signal line, the output holding circuit outputs an abnormality determination signal with a first level to a second output terminal 211, and holds this signal level. When the abnormality detection signal is input from the second abnormality detection signal line, the abnormality determination signal with a second level is output, and this signal level is held.SELECTED DRAWING: Figure 1 【課題】監視対象の半導体装置が自らリセット原因を識別することが可能な監視回路を提供する。【解決手段】監視回路100は、第一の異常検出回路110、第二の異常検出回路111、リセット出力回路112、出力保持回路113を備える。第一の異常検出回路の出力は、第一の異常検出信号線DT1を通してリセット出力回路と出力保持回路にそれぞれ接続される。第二の異常検出回路の出力は、第二の異常検出信号線DT2を通してリセット出力回路と出力保持回路にそれぞれ接続される。リセット出力回路は、第一の異常検出信号と第二の異常検出信号の論理和に基き、リセット信号を出力する。出力保持回路は、第一の異常検出信号線から異常検出信号が入力されると、第二の出力端子211に第一のレベルの異常判別信号を出力し、それを保持する。第二の異常検出信号線から異常検出信号が入力された場合は、第二のレベルの異常判別信号を出力し、それを保持する。【選択図】図1
Bibliography:Application Number: JP20170059972