ABNORMALITY DETECTION DEVICE AND ABNORMALITY DETECTION METHOD
PROBLEM TO BE SOLVED: To provide an abnormality detection device and an abnormality detection method which can detect abnormality that a clock frequency cannot be switched from a high frequency to a low frequency.SOLUTION: An abnormality detection device includes: an abnormality determination sectio...
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Main Authors | , |
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Format | Patent |
Language | English Japanese |
Published |
11.10.2018
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide an abnormality detection device and an abnormality detection method which can detect abnormality that a clock frequency cannot be switched from a high frequency to a low frequency.SOLUTION: An abnormality detection device includes: an abnormality determination section 124 for determining whether a state that a clock frequency of a CPU 12 is a high frequency continues beyond an allowed time; a reset section 125 for resetting the CPU 12 when the abnormality determination section 124 determines the exceedance of the allowed time; and a recovery section 126 for setting the clock frequency to a low frequency after the reset section 125 resets the CPU 12.SELECTED DRAWING: Figure 1
【課題】クロック周波数が高周波数から低周波数に切替わらない異常を検出可能とする。【解決手段】CPU12のクロック周波数が高周波数である状態が許容時間を超えたかを判定する異常判定部124と、異常判定部124により許容時間を超えたと判定された場合に、CPU12をリセットするリセット部125と、リセット部125によりCPU12がリセットされた後、クロック周波数を低周波数に設定する復旧部126とを備えた。【選択図】図1 |
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Bibliography: | Application Number: JP20170057483 |