SiC SEMICONDUCTOR DEVICE MANUFACTURING METHOD
PROBLEM TO BE SOLVED: To manage an impurity implantation step so as to make the maximum density be located in a deep region at a depth more than 100 nm of a surface layer.SOLUTION: A semiconductor device manufacturing method comprises: a step of implanting an impurity into a SiC substrate in such a...
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Main Author | |
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Format | Patent |
Language | English Japanese |
Published |
20.09.2018
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To manage an impurity implantation step so as to make the maximum density be located in a deep region at a depth more than 100 nm of a surface layer.SOLUTION: A semiconductor device manufacturing method comprises: a step of implanting an impurity into a SiC substrate in such a manner that a density at a surface is less than 1×10cmand the maximum density in a depth of more than 100 nm from the surface is equal to or greater than 1×10cm; a surface layer removal process of removing a surface layer of the SiC substrate to a depth preset as a depth where the impurity concentration becomes more than 1×10cmafter the impurity implantation step; and a step of measuring a resistance value of the SiC substrate by a four-point probe method after the surface removal step.SELECTED DRAWING: Figure 1
【課題】表面層の100nm以上の深い領域において最大濃度となるよう不純物注入する工程を管理すること。【解決手段】SiC基板に、表面は1×1020cm−3未満の濃度で、表面から100nm以上の深さにおいて最大濃度が1×1020cm−3以上となるよう不純物を注入する工程の後、SiC基板の表面層を、不純物濃度が1×1020cm−3以上となる深さとして予め設定された深さまで除去する表面層除去工程と、この表面層除去工程の後、当該SiC基板に対して4探針法により抵抗値の測定を行う工程と、を含むようにした。【選択図】図1 |
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Bibliography: | Application Number: JP20170041338 |