IMAGING DEVICE

PROBLEM TO BE SOLVED: To reduce PLS (Parasitic Light Sensitivity) while inhibiting deterioration in sensitivity.SOLUTION: An imaging device comprises in a pixel: a semiconductor substrate; a photoelectric conversion part formed in the semiconductor substrate; a first electric charge storage part for...

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Bibliographic Details
Main Authors MACHIDA TAKASHI, YOSHITA RYOTO
Format Patent
LanguageEnglish
Japanese
Published 20.09.2018
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Summary:PROBLEM TO BE SOLVED: To reduce PLS (Parasitic Light Sensitivity) while inhibiting deterioration in sensitivity.SOLUTION: An imaging device comprises in a pixel: a semiconductor substrate; a photoelectric conversion part formed in the semiconductor substrate; a first electric charge storage part for storing electric charge generated by the photoelectric conversion part; and a first transfer gate part which is formed on an opposite surface opposite to a light incidence surface of the semiconductor substrate and used for transferring electric charge from the photoelectric conversion part to the first electric charge storage part. The first transfer gate part includes a first electrode embedded in a first trench formed in the semiconductor substrate from the opposite surface of the semiconductor substrate; and the photoelectric conversion part includes a second electrode which surrounds the first electrode and at least part of a circumference of the first electrode. The present art can be applied to a CMOS image sensor, for example.SELECTED DRAWING: Figure 6 【課題】感度の低下を抑制しつつ、PLSを低減する。【解決手段】撮像素子は、半導体基板と、前記半導体基板内に形成されている光電変換部と、前記光電変換部で生成された電荷を蓄積する第1の電荷蓄積部と、前記半導体基板の光の入射面と反対側の反対面に形成され、前記光電変換部から前記第1の電荷蓄積部への電荷の転送に用いられる第1の転送ゲート部とを画素内に備え、前記第1の転送ゲート部は、前記半導体基板の反対面から前記半導体基板内に形成されている第1のトレンチに埋め込まれている第1の電極を備え、前記光電変換部は、前記第1の電極と、前記第1の電極の周囲の少なくとも一部を囲む第2の電極とを備える。本技術は、例えば、CMOSイメージセンサに適用できる。【選択図】図6
Bibliography:Application Number: JP20170040136