PHASE ERROR CORRECTION DEVICE AND WIRELESS TRANSMITTER

• Main Authors: NAKA JUNICHI, MIKI TAKUJI, OZEKI TOSHIAKI, MORI HIROKI
• Format: Patent
• Language: English; Japanese
• Published: 14.12.2017
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION

PROBLEM TO BE SOLVED: To correct a phase error of the output waveform of multiple DA converters.SOLUTION: A phase error correction device for correcting the phase error between respective output signals from multiple DA converters includes a comparator circuit inputting a reference signal having a changing data value to each DA converter, comparing an analog signal from each DA converter with a predetermined threshold value and outputting a binary comparison result signal, and control means for adjusting the phase of the reference signal so that respective binary appearances of comparison result signals from the comparator circuit are substantially identical, or adjusting a phase of a clock for controlling the operation of the comparator circuit. A divider for dividing the clock by a predetermined division ratio may be included furthermore. The comparator circuit may compare the reference signal with the threshold, by using a threshold having hysteresis characteristics at the time of rising and falling of the reference signal.SELECTED DRAWING: Figure 1A 【課題】複数のＤＡ変換器の出力波形の位相誤差を補正する。【解決手段】複数のＤＡ変換器からの各出力信号間の位相誤差の補正を行う位相誤差補正装置であって、データ値が変化する参照信号を前記各ＤＡ変換器に入力し、前記各ＤＡ変換器からのアナログ信号を所定のしきい値と比較して二値の比較結果信号を出力する比較回路と、前記比較回路からの前記比較結果信号の二値の各出現が互いに実質的に同一となるように前記参照信号の位相を調整し、もしくは、前記比較回路の動作を制御するクロックの位相を調整する制御手段とを備える。ここで、前記クロックを所定の分周比で分周する分周器をさらに備えてもよい。また、前記比較回路は、前記参照信号の立ち上がり及び立ち下がり時においてヒステリシス特性を有するしきい値を用いて前記参照信号を前記しきい値と比較してもよい。【選択図】図１Ａ