OSCILLATION CIRCUIT
PROBLEM TO BE SOLVED: To suppress jitter of oscillation frequency of an oscillation circuit.SOLUTION: An oscillation circuit includes an oscillator generating an oscillation clock signal, a NMOS transistor, an operational amplifier, and a charge pump. The NMOS transistor has a source connected with...
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Main Author | |
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Format | Patent |
Language | English Japanese |
Published |
14.12.2017
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To suppress jitter of oscillation frequency of an oscillation circuit.SOLUTION: An oscillation circuit includes an oscillator generating an oscillation clock signal, a NMOS transistor, an operational amplifier, and a charge pump. The NMOS transistor has a source connected with the power supply end of the oscillator, and a drain connected with a power source line to which power source voltage is supplied. The operational amplifier controls gate voltage of the NMOS transistor according to the voltage at the power supply end of the oscillator. A charge pump generates a step-up power supply voltage by boosting the power source voltage using the oscillation clock signal or a clock signal generated therefrom, thereby generating a boosted power source voltage, and supplying to the power source end of the operational amplifier.SELECTED DRAWING: Figure 2
【課題】発振回路の発振周波数のジッタを抑制する。【解決手段】発振回路が、発振クロック信号を生成する発振器と、NMOSトランジスタと、演算増幅器と、チャージポンプとを具備する。NMOSトランジスタは、発振器の電源端にソースが接続され、電源電圧が供給されている電源線にドレインが接続されている。演算増幅器は、発振器の電源端の電圧に応じてNMOSトランジスタのゲート電圧を制御する。チャージポンプは、該発振クロック信号又は該発振クロック信号から生成されたクロック信号を用いて電源電圧を昇圧して昇圧電源電圧を生成し、昇圧電源電圧を演算増幅器の電源端に供給する。【選択図】図2 |
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Bibliography: | Application Number: JP20160111890 |