METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE

• Main Authors: NAKAMURA HIROKI, MASUOKA FUJIO
• Format: Patent
• Language: English; Japanese
• Published: 24.11.2017
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide an SGT structure in which a fin-like semiconductor layer, a columnar semiconductor layer, a gate electrode and gate wiring are formed by two masks, and a gate last process is used, and an upper part of the columnar semiconductor layer is made function as an n-type semiconductor layer or a p-type semiconductor layer by a work function difference between a metal and a semiconductor by self-alignment, and to provide a method of manufacturing the same.SOLUTION: The method includes first to sixth steps. The first step forms a first insulating film around the fin-like semiconductor layer. The second step forms a columnar semiconductor layer, and a first dummy gate by first polysilicon. The third step forms a second dummy gate on sidewalls of the first dummy gate and the columnar semiconductor layer. The fourth step forms a sidewall consisting of a fifth insulating film and remaining in a sidewall shape around the second dummy gate, forms a second diffusion layer at an upper part of the fin-like semiconductor layer and a lower part of the columnar semiconductor layer, and forms a compound of a metal and a semiconductor on the second diffusion layer.SELECTED DRAWING: Figure 1 【課題】２個のマスクで、フィン状半導体層、柱状半導体層、ゲート電極とゲート配線を形成し、ゲートラストプロセスであり、自己整合で柱状半導体層上部を金属と半導体との仕事関数差によってｎ型半導体層もしくはｐ型半導体層として機能させるＳＧＴ構造とその製造方法を提供する。【解決手段】第１〜第６の工程を有する。第１工程は、フィン状半導体層の周囲に第１の絶縁膜を形成する。第２工程は、柱状半導体層と第１のポリシリコンによる第１のダミーゲートを形成する。第３工程は、前記第１のダミーゲートと前記柱状半導体層の側壁に第２のダミーゲートを形成する。第４工程は、前記第２のダミーゲートの周囲に、サイドウォール状に残存させ、第５の絶縁膜からなるサイドウォールを形成し、前記フィン状半導体層上部と前記柱状半導体層下部に第２の拡散層を形成し、前記第２の拡散層上に金属と半導体の化合物を形成する。【選択図】図１