MANUFACTURING METHOD OF VIA CONDUCTOR STRUCTURE

• Main Authors: ADACHI TAKEMA, NODA KOTA
• Format: Patent
• Language: English; Japanese
• Published: 26.10.2017
• Subjects: BASIC ELECTRIC ELEMENTS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a manufacturing method of via conductor structure capable of manufacturing a via conductor structure of fine pitch as designed, while shortening the manufacturing significantly.SOLUTION: A manufacturing method of via conductor structure includes a step of preparing multiple first metal foil pieces 25 having multiple interconnections 22 extending in one direction in stripe and a frame 23 surrounding the multiple interconnections 22, where a first alignment hole 23a is formed in the frame 23, a step of preparing multiple prepregs 33 or 39, a step of laminating the first metal foil pieces 25 and prepregs 33 or 39 alternately, so that the interconnections 22 are arranged in the same direction between multiple first metal foil pieces 25, with the first alignment hole 23a as an alignment mark, a step of forming an integrated laminate structure 37 by hot pressing the laminated first metal foil pieces 25 and prepregs 33 or 39, and a step of cutting the laminate structure 37 in a direction orthogonal to the extension direction of the interconnections 22.SELECTED DRAWING: Figure 7 【課題】ファインピッチのビア導体構造体を設計どおり製造することができ、かつ製造時間を大幅に短縮することが可能なビア導体構造の製造方法を提案する。【解決手段】ビア導体構造体の製造方法は、一方向にストライプ状に延びる複数の配線２２と該複数の配線２２を取り囲む枠部２３とを有し、該枠部２３に第１のアライメント穴２３ａが形成された第１の金属箔片２５を複数準備する工程と、複数のプリプレグ片３３又は３９を準備する工程と、複数の第１の金属箔片２５間で配線２２が同一方向に並ぶように、第１のアライメント穴２３ａをアライメントマークとして第１の金属箔片２５とプリプレグ片３３又は３９とを交互に積層する工程と、積層された第１の金属箔片２５および、プリプレグ片３３又は３９を加熱および加圧することで、一体化された積層構造体３７を形成する工程と、積層構造体３７を、配線２２の延在方向に対し直交する方向に切断する工程と、を含む。【選択図】図７