EPITAXIAL WAFER MANUFACTURING METHOD

• Main Author: YOSHIOKA SHOHEI
• Format: Patent
• Language: English; Japanese
• Published: 26.10.2017
• Subjects: BASIC ELECTRIC ELEMENTS; CHEMICAL SURFACE TREATMENT; CHEMISTRY; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING MATERIAL WITH METALLIC MATERIAL; COATING METALLIC MATERIAL; DIFFUSION TREATMENT OF METALLIC MATERIAL; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL; METALLURGY; SEMICONDUCTOR DEVICES; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION

PROBLEM TO BE SOLVED: To provide an epitaxial wafer manufacturing method capable of inhibiting stack fault.SOLUTION: An epitaxial wafer manufacturing method comprises a preparation process and a growth process. In the preparation process, a red phosphorous-doped substrate W having a low resistivity is prepared. The substrate W is added with phosphorous equal to or more than 5×10atoms/cmas a dopant. In the growth process, an epitaxial layer is grown on the substrate W at a temperature not less than 1040°C and not more than 1130°C and at a growth rate equal to or less than 2 μm/min.SELECTED DRAWING: Figure 6 【課題】積層欠陥を抑制可能なエピタキシャルウェーハの製造方法を提供する。【解決手段】エピタキシャルウェーハの製造方法は、準備する工程と、成長する工程を備える。準備する工程は、赤燐がドープされた低抵抗率の基板Ｗを準備する。基板Ｗは、ドーパントとしてリンが５×１０１９ａｔоｍｓ／ｃｍ３以上添加される。成長する工程は、基板Ｗに１０４０℃以上かつ１１３０℃以下の温度でエピタキシャル層を２μｍ／ｍｉｎ以下の成長速度で成長させる。【選択図】図６