TEST SYSTEM AND TEST APPARATUS

PROBLEM TO BE SOLVED: To provide a test system for easily corresponding to an up-to-date semiconductor device and/or suppressing an increase of costs.SOLUTION: At least one general-purpose server 110 is connected to a PE module 120 via Ethernet. A control unit 130 of the PE module 120 controls a PE...

Full description

Saved in:
Bibliographic Details
Main Authors KOSUGI MASAAKI, SAKAMOTO MITSUSUKE, HOMMA TAKAHIRO, OGURO TAKASHI, OMORI HIDETO, FUJII TOSHIAKI
Format Patent
LanguageEnglish
Japanese
Published 05.10.2017
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
STATIC STORES
TESTING
Online AccessGet full text

Cover

More Information
Summary:PROBLEM TO BE SOLVED: To provide a test system for easily corresponding to an up-to-date semiconductor device and/or suppressing an increase of costs.SOLUTION: At least one general-purpose server 110 is connected to a PE module 120 via Ethernet. A control unit 130 of the PE module 120 controls a PE circuit 122 and a plurality of fail memories 124 in real time, temporarily maintains fail information of the fail memories 124, performs a data processing, and transfers the fail information to the general-purpose server 110. The general-purpose server 110 is programmably controlled to perform redundancy relief analysis for a DUT 202, based on the data received from the PE module 120.SELECTED DRAWING: Figure 2 【課題】最新の半導体デバイスに対応することが容易であり、および／または、コストの上昇を抑制可能なテストシステムを提供する。【解決手段】少なくともひとつの汎用サーバ１１０は、イーサネットを介してＰＥモジュール１２０と接続される。ＰＥモジュール１２０の制御部１３０は、ＰＥ回路１２２および複数のフェイルメモリ１２４をリアルタイム制御するとともに、複数のフェイルメモリ１２４のフェイル情報を一旦保持し、データ処理した後に汎用サーバ１１０へと転送する。汎用サーバ１１０は、ＰＥモジュール１２０からのデータにもとづいてＤＵＴ２０２の冗長救済解析を行うように、プログラム制御される。【選択図】図２
Bibliography:Application Number: JP20170104754