SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor device for reducing the restriction of control timing of H/W_IP by a CPU.SOLUTION: The semiconductor device comprises a central processing unit and a processing unit on one semiconductor substrate. The processing unit includes a buffer for storing a r...

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Bibliographic Details
Main Authors HASE AKIRA, TSUDA TETSUJI, NISHIKAWA NAOHIRO, INOUE YUKI
Format Patent
LanguageEnglish
Japanese
Published 16.02.2017
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor device for reducing the restriction of control timing of H/W_IP by a CPU.SOLUTION: The semiconductor device comprises a central processing unit and a processing unit on one semiconductor substrate. The processing unit includes a buffer for storing a register setting list, and notifies the central processing unit of an access end signal indicative of the completion of reading of the register setting list. The central processing unit changes the register setting list in a memory based on the access end signal, and notifies the processing unit of an update request signal. Based on update request information, the processing unit causes the register setting list changed by the central processing unit to be read into the buffer.SELECTED DRAWING: Figure 9 【課題】CPUによるH/W_IPの制御タイミングの制約を低減する半導体装置を提供することにある。【解決手段】半導体装置は中央処理装置と処理装置とを1つの半導体基板に備える。処理装置はレジスタ設定リストを格納するバッファを備え、レジスタ設定リストの読み込みの終了を示すアクセス終了信号を中央処理装置に通知する。中央処理装置はアクセス終了信号に基づいてメモリ内のレジスタ設定リストを変更し、更新要求信号を処理装置に通知する。処理装置は、中央処理装置によって変更されたレジスタ設定リストを前記更新要求情報に基づいてバッファに読み込む。【選択図】図9
Bibliography:Application Number: JP20150158722