SEMICONDUCTOR LAMINATE, LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING SEMICONDUCTOR LAMINATE

• Main Authors: FUYUKI TAKUMA, YOSHIZUMI YUSUKE, AKITA KATSUSHI, ARIKATA SUGURU, KYONO TAKASHI
• Format: Patent
• Language: English; Japanese
• Published: 08.12.2016
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a semiconductor laminate, a light receiving element, and a method of manufacturing a semiconductor laminate, capable of improving sensitivity of a light receiving element including a semiconductor layer formed of a group III-V compound semiconductor, and of reducing a dark current.SOLUTION: A semiconductor laminate 10 comprises: a first conductivity type layer 30 formed of a group III-V compound semiconductor, and whose conductivity type is a first conductivity type; a quantum well light-receiving layer 40 formed of a group III-V compound semiconductor; and a second conductivity type layer 50 formed of a group III-V compound semiconductor, and whose conductivity type is a second conductivity type different from the first conductivity type. The first conductivity type layer 30, the quantum well light-receiving layer 40, and the second conductivity type layer 50 are laminated in this order. A thickness of the quantum well light-receiving layer 40 is equal to or more than 0.5 μm. In the quantum well light-receiving layer 40, a carrier concentration is equal to or less than 1×10cm.SELECTED DRAWING: Figure 1 【課題】ＩＩＩ−Ｖ族化合物半導体からなる半導体層を含む受光素子の感度を向上させるとともに、暗電流を低減することが可能な半導体積層体、受光素子および半導体積層体の製造方法を提供する。【解決手段】半導体積層体１０は、ＩＩＩ−Ｖ族化合物半導体からなり、導電型が第１導電型である第１導電型層３０と、ＩＩＩ−Ｖ族化合物半導体からなる量子井戸受光層４０と、ＩＩＩ−Ｖ族化合物半導体からなり、導電型が第１導電型とは異なる第２導電型である第２導電型層５０と、を備える。第１導電型層３０、量子井戸受光層４０および第２導電型層５０は、この順に積層される。量子井戸受光層４０の厚みは０．５μｍ以上である。量子井戸受光層４０において、キャリア濃度は１×１０１６ｃｍ−３以下である。【選択図】図１