SOLID STATE IMAGING DEVICE

PROBLEM TO BE SOLVED: To provide a solid state imaging device capable of preventing an optical charge of photoelectric conversion elements adjacent to each other from mixing, and realizing miniaturization.SOLUTION: A solid state imaging device includes a plurality of pixels 103. The solid state imag...

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Main Authors AISU KATSUHIKO, NEGORO TAKAAKI, YONEDA KAZUHIRO, UEDA KEITOKU, WATANABE HIROBUMI, ONO KATSUYUKI, NAKATANI YASUKAZU
Format Patent
LanguageEnglish
Japanese
Published 23.05.2016
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Summary:PROBLEM TO BE SOLVED: To provide a solid state imaging device capable of preventing an optical charge of photoelectric conversion elements adjacent to each other from mixing, and realizing miniaturization.SOLUTION: A solid state imaging device includes a plurality of pixels 103. The solid state imaging device further comprises: a first semiconductor layer 105 of a first electrical conduction type; a second semiconductor layer 107 of the first electrical conduction type adjacently arranged to the first semiconductor layer 105; a second electrical conduction type semiconductor region 111 arranged in the second semiconductor layer 107; a deep groove 123 that insulates and separates the neighboring pixels 103; and an electrode 127 embedded in the deep groove 123. The electrical conduction type semiconductor region 111, the second semiconductor layer 107, and the first semiconductor layer 105 are arranged in order from the front surface side. The second semiconductor layer 107 is separated in each pixels 103 by the deep grove 123. An impurity density of the first electrical conduction type of the first semiconductor layer 105 is higher than the impurity density of the first electrical conduction type of the second semiconductor layer 107. The deep grove 123 is contacted with the first semiconductor layer 105.SELECTED DRAWING: Figure 1 【課題】固体撮像素子において、隣り合う光電変換素子同士の光電荷が混ざるのを防止し、かつ微細化を実現する。【解決手段】固体撮像素子は複数の画素103を備えている。また、固体撮像素子は、第1導電型の第1半導体層105と、第1半導体層105上に隣接して配置された第1導電型の第2半導体層107と、第2半導体層107内に配置された第2導電型半導体領域111と、隣り合う画素103同士を絶縁分離する深溝123と、深溝123内に埋め込まれた電極127と、を備えている。表面側から第2導電型半導体領域111、第2半導体層107、第1半導体層105の順に並んでいる。第2半導体層107は深溝123によって画素103ごとに分離されている。第1半導体層105の第1導電型の不純物濃度は第2半導体層107の第1導電型の不純物濃度に比べて高い。深溝123は第1半導体層105に接している。【選択図】図1
Bibliography:Application Number: JP20140224272