INFORMATION PROCESSING DEVICE, MEMORY CONTROLLER, AND CONTROL METHOD OF INFORMATION PROCESSING DEVICE

• Main Authors: HOSOE KOJI, AIHARA MASATOSHI, TOYODA YUTA, TOKIYODA AKIO, SUGA MAKOTO
• Format: Patent
• Language: English; Japanese
• Published: 12.05.2016
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PROBLEM TO BE SOLVED: To provide an information processing device that efficiently utilizes memory performance, a memory controller, and a control method of the information processing device.SOLUTION: I/F 25 and 26 are connected with an HMC 3. A request queue 21 receives a reading request or a writing request from a processor 1. An I/F selection section 23 calculates a required time for receiving a response to a reading request having been transmitted and a writing request having been transmitted for each of the I/F 25 and 26 on the basis of the number of the reading request having been transmitted and the writing request having been transmitted that had been already transmitted to the I/F 25 and 26 and had not yet been responded to select a use output passage on the basis of the required time. A transmission section 22 transmits the reading request or writing request to the HMC 3 via the use output passage. A response management section 24 receives a response from the HMC 3 via the use output passage.SELECTED DRAWING: Figure 1 【課題】メモリの性能を効率的に利用する情報処理装置、メモリ制御装置及び情報処理装置の制御方法を提供する。【解決手段】Ｉ／Ｆ２５及び２６は、ＨＭＣ３に接続する。リクエストキュー２１は、読出要求又は書込要求をプロセッサ１から受信する。Ｉ／Ｆ選択部２３は、Ｉ／Ｆ２５及び２６に既に送信され且つ応答を受信していない送信済み読出要求及び送信済み書込要求の数を基に、送信済み読出要求及び前記送信済み書込要求に対する応答を受信するまでの所要時間をＩ／Ｆ２５及び２６毎に算出し、所要時間を基に使用出力経路を選択する。送信部２２は、読出要求又は書込要求を、使用出力経路を介してＨＭＣ３に送信する。レスポンス管理部２４は、ＨＭＣ３からの応答を使用出力経路を介して受信する。【選択図】図１