SOLDER CHIP, METHOD FOR MANUFACTURING GLASS SUBSTRATE WITH TERMINAL BY USE OF SOLDER CHIP

• Main Authors: YAMAGUCHI MASATOSHI, YUKI SHINICHIRO
• Format: Patent
• Language: English; Japanese
• Published: 28.04.2016
• Subjects: CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MACHINE TOOLS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; METAL-WORKING NOT OTHERWISE PROVIDED FOR; PERFORMING OPERATIONS; PRINTED CIRCUITS; SOLDERING OR UNSOLDERING; TRANSPORTING; WELDING; WORKING BY LASER BEAM

PROBLEM TO BE SOLVED: To provide a solder chip which can improve bonding yield.SOLUTION: A solder chip 10 used for bonding of a conductive film 30 formed on a glass substrate 20 and a terminal 40 has: a first surface 11 which is brought into surface contact with a surface of the conductive film 30 facing the terminal 40, and on which a dummy recess 14 corresponding to an accommodation recess 13 is formed; and a second surface 12 which is brought into surface contact with a surface of the terminal 40 facing the conductive film 30, and on which an accommodation recess 13, which accommodates a projection 42 formed on the surface of the terminal 40 facing the conductive film 30, is formed.SELECTED DRAWING: Figure 2 【課題】接合の歩留まりを改善できる、半田チップの提供。【解決手段】ガラス基板２０に形成される導電膜３０と端子４０との接合に用いられる半田チップ１０であって、前記導電膜３０における前記端子４０との対向面と面接触し、収容凹部１３に対応するダミー凹部１４が形成されている第１面１１と、前記端子４０における前記導電膜３０との対向面と面接触し、前記端子４０における前記導電膜３０との対向面に形成される突起４２を収容する収容凹部１３が形成されている第２面１２とを有する、半田チップ１０。【選択図】図２