TRANSMISSION DEVICE

• Main Author: SHINOHARA SHOTA
• Format: Patent
• Language: English; Japanese
• Published: 12.01.2016
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; PHYSICS; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION

PROBLEM TO BE SOLVED: To reduce the number of terminals.SOLUTION: A low speed optical signal processing part 10 includes: an FPGA(Field Programmable Gate Array) 12 for control; an optical module 13a; and a signal amplification device 14a. The FPGA 12 for control outputs a data signal which is common to the optical module 13a and the signal amplification device 14a and a clock signal capable of individually controlling the optical module 13a and the signal amplification device 14a to each of the optical module 13a and the signal amplification device 14a. The FPGA 12 for control controls the optical module 13a and the signal amplification device 14a. 【課題】端子数を減少することである。【解決手段】低速光信号処理部１０は、制御用ＦＰＧＡ１２と光モジュール１３ａと信号増幅デバイス１４ａとを有する。制御用ＦＰＧＡ１２は、光モジュール１３ａ、信号増幅デバイス１４ａの各々に対し、光モジュール１３ａと信号増幅デバイス１４ａとに共通のデータ信号と、光モジュール１３ａと信号増幅デバイス１４ａとを個別に制御可能なクロック信号とを出力する。制御用ＦＰＧＡ１２は、光モジュール１３ａと信号増幅デバイス１４ａとを制御する。【選択図】図１