METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

• Main Author: TAKAMI KOKI
• Format: Patent
• Language: English; Japanese
• Published: 21.12.2015
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; PICTORIAL COMMUNICATION, e.g. TELEVISION; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which can solve a problem that dispersion in flatness occurs within a wafer surface.SOLUTION: A method of manufacturing a semiconductor device prepares a wafer on which an insulator having plural portions serving as semiconductor devices and plural openings is provided, forming an embedding member in the plural openings and on the insulator, removing at least a part of the embedding member and flattening the embedding member. The plural portions have a first part and a second part nearer to the outside of the wafer than the first part, and the first part and the second part have a first area and a second area at a position different from the position of the first area. The plural openings are arranged at a higher density in the first area than that in the second area. In the step of removing at least a part, the embedding member located in the second area of the first part is removed, and the embedding member located in the second area of the second part is removed. A first removal amount at which the embedding member located in the second area of the first part is removed is different from a second removal amount at which the embedding member located in the second area of the second part is removed. 【課題】 ウエハ面内で平坦化ばらつきが生じる。【解決手段】 半導体装置の製造方法は、半導体装置となる複数の部分を有し、複数の開口を有する絶縁体が上に設けられたウエハを準備し、複数の開口のそれぞれの中と、絶縁体の上とに埋め込み部材を形成し、埋め込み部材の少なくとも一部を除去し、埋め込み部材を平坦化する。複数の部分は、第１部分と、それよりもウエハの外側の第２部分を有し、第１部分と第２部分は、第１領域と、それとは異なる位置の第２領域を有する。複数の開口は、第１領域に第２領域よりも高い密度で配置されている。少なくとも一部を除去する工程では、第１部分の第２領域に位置する埋め込み部材を除去し、第２部分の第２領域に位置する埋め込み部材を除去する。ここで、第１部分の第２領域に位置する埋め込み部材を除去する第１除去量と、第２部分の第２領域に位置する埋め込み部材を除去する第２除去量は異なる。【選択図】 図４