SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To achieve low cost while ensuring bonding reliability in wire bonding of a semiconductor device.SOLUTION: A BGA (Ball Grid Array) manufacturing method comprises the steps of: preparing a semiconductor chip 12 having an electrode pad 12b; subsequently removing a natural oxide f...

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Bibliographic Details
Main Authors TOBITA AKIHIRO, YAGYU YUKI, AKIBA TOSHIHIKO
Format Patent
LanguageEnglish
Japanese
Published 07.12.2015
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Summary:PROBLEM TO BE SOLVED: To achieve low cost while ensuring bonding reliability in wire bonding of a semiconductor device.SOLUTION: A BGA (Ball Grid Array) manufacturing method comprises the steps of: preparing a semiconductor chip 12 having an electrode pad 12b; subsequently removing a natural oxide film formed on a surface of the electrode pad 12b; further forming a first film 12d composed of a conductive member on the surface of the electrode pad 12b exposed by removal of the natural oxide film; subsequently connecting a wire 11 to the first film 12d; and forming an alloy layer 12e at a boundary surface between the wire 11 and the electrode pad 12b by bringing part of the wire 11 into contact with the electrode pad 12b. In this case, a crystal structure of the first film 12d is composed of a body-centered cubic lattice or a hexagonal close-packed lattice. 【課題】半導体装置のワイヤ接合における接合信頼性を確保しつつ、低コスト化を実現する。【解決手段】BGAの製造方法は、電極パッド12bを有する半導体チップ12を準備し、その後、電極パッド12bの表面に形成された自然酸化膜を除去する。さらに、上記自然酸化膜の除去により露出した電極パッド12bの表面に、導電性部材から成る第1の膜12dを形成し、その後、第1の膜12dにワイヤ11を接続し、ワイヤ11の一部を電極パッド12bに接触させることにより、ワイヤ11と電極パッド12bとの境界面に合金層12eを形成する。ここで、第1の膜12dの結晶構造は、体心立方格子または六方最密格子から成る。【選択図】図2
Bibliography:Application Number: JP20140100434