SEMICONDUCTOR DEVICE

• Main Authors: NISHIKAWA YUKIE, KISHIDA MOTOYA, TAKAHASHI NORIHIRO, AKAIKE YASUHIKO
• Format: Patent
• Language: English; Japanese
• Published: 05.10.2015
• Subjects: BASIC ELECTRIC ELEMENTS; CHEMICAL SURFACE TREATMENT; CHEMISTRY; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING MATERIAL WITH METALLIC MATERIAL; COATING METALLIC MATERIAL; DIFFUSION TREATMENT OF METALLIC MATERIAL; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL; METALLURGY; SEMICONDUCTOR DEVICES; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of inhibiting warpage of a wafer and a chip to improve manufacturing yield.SOLUTION: A semiconductor device according to an embodiment comprises: a semiconductor layer; a first electrode provided on a surface of the semiconductor layer; a plurality of second electrodes which are provided on the first electrode and each of which has a rectangle cross sectional shape parallel with the surface of the semiconductor layer and having sides that are 50 micrometer or less; and a resin layer provided among the plurality of second electrodes and having ductility higher than that of the second electrodes. 【課題】実施形態は、ウェーハおよびチップの反りを抑制し、製造歩留りを向上させることが可能な半導体装置を提供する。【解決手段】実施形態に係る半導体装置は、半導体層と、前記半導体層の表面上に設けられた第１電極と、前記第１電極上に設けられ、前記半導体層の前記表面に平行な断面形状が５０マイクロメートル以下の辺を有する矩形である複数の第２電極と、前記複数の第２電極の間に設けられ、前記第２電極よりも延性が高い樹脂層と、を備える。【選択図】図１