MULTILAYER CERAMIC CAPACITOR AND MOUNTING BOARD FOR THE SAME

• Main Authors: LEE KYO KWANG, KIM JIN, LEE BYOUNG HWA, IM HWI GEUN, AHN YOUNG GHYU, KIM HYUN TAE
• Format: Patent
• Language: English; Japanese
• Published: 07.09.2015
• Subjects: BASIC ELECTRIC ELEMENTS; CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES ORLIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE; ELECTRICITY

PROBLEM TO BE SOLVED: To provide a multilayer ceramic capacitor and a mounting board for the multilayer ceramic capacitor.SOLUTION: The present invention provides a multilayer ceramic capacitor and a mounting board for the multilayer ceramic capacitor. The multilayer ceramic capacitor includes three external electrodes which are formed by sequentially stacking a conductive layer, a nickel plating layer, and a tin plating layer on a mounting surface of a ceramic body, and spaced apart from each other. When an outermost portion of a lead-out portion of an internal electrode, the outermost portion being exposed to the mounting surface of the ceramic body, is P, a total thickness of the conductive layer, the nickel plating layer, and the tin plating layer in a normal line direction of the conductive layer from P is a, a thickness of the conductive layer in the normal line direction of the conductive layer from P is b, and a sum of thicknesses of pores existing in the conductive layer in the normal line direction of the conductive layer from P is b, 0.264≤(b-b)/a≤0.638 is satisfied. 【課題】本発明は、積層セラミックキャパシタ及びその実装基板に関する。【解決手段】本発明は、セラミック本体の実装面に導電層、ニッケルメッキ層、及びスズメッキ層が順次積層されて形成された３つの外部電極を互いに離隔して配置し、内部電極のリード部において上記セラミック本体の実装面に露出する最外郭部分をＰ、上記Ｐから上記導電層の法線方向への上記導電層、上記ニッケルメッキ層、及び上記スズメッキ層の全体の厚さをａ、上記Ｐから上記導電層の法線方向への上記導電層の厚さをｂ、上記Ｐから上記導電層の法線方向に上記導電層に存在するポア（ｐｏｒｅ）の厚さの和をｂｐとしたとき、０．２６４ （ｂ−ｂｐ）／ａ ０．６３８を満たす積層セラミックキャパシタ及びその実装基板を提供する。【選択図】図５