ESD PROTECTION CIRCUIT

• Main Author: CORONEL ARISTOTLE MALAY
• Format: Patent
• Language: English; Japanese
• Published: 03.09.2015
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide an ESD protection circuit which protects a middle withstand voltage CMOS device by combing low withstand voltage devices having high ESD resistance and high reliability as a stable, reliable, simple and compact solution.SOLUTION: An ESD protection circuit includes: a P-type MOS transistor P1 to which a first terminal 11 whose ESD surge 10 is applied to a source is connected, and in which the source, a bulk and a gate are connected; and an N-type MOS transistor N1 in which a drain is connected to the drain of the P-type MOS transistor P1, in which the source is connected to a second terminal 12 and in which the source, the bulk and the gate are connected. 【課題】安定、安心、シンプル、尚且つ、コンパクトなソリューションとしてＥＳＤ耐性が高く信頼性の高い低耐圧デバイスの組み合わせにより、中耐圧ＣＭＯＳデバイスを保護するＥＳＤ保護回路を提供する。【解決手段】ソースにＥＳＤサージ１０が印加される第１端子１１が接続され、ソースとバルクとゲートが接続されたＰ型ＭＯＳトランジスタＰ１と、ドレインが前記Ｐ型ＭＯＳトランジスタＰ１のドレインと接続され、ソースが第２端子１２に接続され、ソースとバルクとゲートが接続されたＮ型ＭＯＳトランジスタＮ１と、を具える。【選択図】図４