MULTILAYER CIRCUIT BOARD

PROBLEM TO BE SOLVED: To provide a multilayer circuit board capable of reducing the impedance of a power supply pattern.SOLUTION: A multilayer circuit board 100 comprises a plurality of insulating layers 110, a plurality of conductor layers 120, a power supply via 150, and a ground via 160. The plur...

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Bibliographic Details
Main Authors KUSANO YOSHIYUKI, ISHIZAKA SATORU, YAMANAKA YASUHIRO, ITO TAKAHIRO
Format Patent
LanguageEnglish
Japanese
Published 20.08.2015
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Summary:PROBLEM TO BE SOLVED: To provide a multilayer circuit board capable of reducing the impedance of a power supply pattern.SOLUTION: A multilayer circuit board 100 comprises a plurality of insulating layers 110, a plurality of conductor layers 120, a power supply via 150, and a ground via 160. The plurality of insulating layers 110 and the plurality of conductor layers 120 are alternately laminated. The plurality of conductor layers 120 include a power supply pattern layer 130 and a ground pattern layer 140. The power supply via 150 penetrates the power supply pattern layer 130 and the ground pattern layer 140, conducts with the power supply pattern layer 130, and does not conduct with the ground pattern layer 140. The ground via 160 penetrates the power supply pattern layer 130 and the ground pattern layer 140, conducts with the ground pattern layer 140, and does not conduct with the power supply pattern layer 130. The power supply pattern layer 130 includes a clearance 132 around the ground via 160. The ground pattern layer 140 includes a clearance 142 around the power supply via 150. 【課題】電源パターンのインピーダンスを低減できるようにすることを目的とする。【解決手段】多層回路基板100は複数の絶縁層110と複数の導体層120と電源ビア150とグラウンドビア160とを備える。複数の絶縁層110と複数の導体層120とは交互に積層される。複数の導体層120は電源パターン層130とグラウンドパターン層140とを含む。電源ビア150は電源パターン層130とグラウンドパターン層140とを貫通し、電源パターン層130と導通し、グラウンドパターン層140と導通しない。グラウンドビア160は電源パターン層130とグラウンドパターン層140とを貫通し、グラウンドパターン層140と導通し、電源パターン層130と導通しない。電源パターン層130はグラウンドビア160の周囲にクリアランス132を備え、グラウンドパターン層140は電源ビア150の周囲にクリアランス142を備える【選択図】図1
Bibliography:Application Number: JP20140020554