SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same, which can achieve stable characteristics against a change in temperature.SOLUTION: A semiconductor device according to an embodiment includes a first semiconductor region, a second semiconductor region an...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
23.03.2015
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same, which can achieve stable characteristics against a change in temperature.SOLUTION: A semiconductor device according to an embodiment includes a first semiconductor region, a second semiconductor region and a third semiconductor region. The first semiconductor region includes silicon carbide. A conductivity type of the first semiconductor region is a first conductivity type. The second semiconductor region includes silicon carbide. A conductivity type of the second semiconductor region is a second conductivity type. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region includes silicon carbide. A conductivity type of the third semiconductor region is a second conductivity type. The third semiconductor region is provided between the first semiconductor region and the second semiconductor region. When viewed in a direction which links the first semiconductor region and the second semiconductor region, an area of a region where the second semiconductor region and the third semiconductor region overlap each other is smaller than an area where the first semiconductor region and the second semiconductor region overlap each other.
【課題】温度の変化に対して安定した特性を得ることができる半導体装置及びその製造方法を提供すること。【解決手段】実施形態に係る半導体装置は、第1半導体領域と、第2半導体領域と、第3半導体領域と、を含む。前記第1半導体領域は、炭化珪素を含む。前記第1半導体領域の導電形は、第1導電形である。前記第2半導体領域は、炭化珪素を含む。前記第2半導体領域の導電形は、第2導電形である。前記第2半導体領域は、前記第1半導体領域の上に設けられる。前記第3半導体領域は、炭化珪素を含む。前記第3半導体領域の導電形は、第2導電形である。前記第3半導体領域は、前記第1半導体領域と前記第2半導体領域との間に設けられる。前記前記第1半導体領域と前記第2半導体領域とを結ぶ方向にみて、前記第2半導体領域と前記第3半導体領域とが重なる領域の面積は、前記第1半導体領域と前記第2半導体領域とが重なる領域の面積よりも狭い。【選択図】図1 |
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Bibliography: | Application Number: JP20130189795 |