SEMICONDUCTOR SOCKET AND SEMICONDUCTOR MODULE

PROBLEM TO BE SOLVED: To improve a degree of freedom in wiring while achieving high integration in connection of a plurality of semiconductor packages.SOLUTION: In an IC socket 2, on an opposed surface opposed to LSI packages 1 and 3, a plurality of terminals corresponding to arrangement of a plural...

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Bibliographic Details
Main Authors KAWAI TAKEHIRO, MATSUO TOSHIHIKO, OTSUJI AKIO
Format Patent
LanguageEnglish
Japanese
Published 12.03.2015
Subjects
BASIC ELECTRIC ELEMENTS
CURRENT COLLECTORS
ELECTRICITY
LINE CONNECTORS
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Summary:PROBLEM TO BE SOLVED: To improve a degree of freedom in wiring while achieving high integration in connection of a plurality of semiconductor packages.SOLUTION: In an IC socket 2, on an opposed surface opposed to LSI packages 1 and 3, a plurality of terminals corresponding to arrangement of a plurality of terminals on the LSI package 1 are arranged. Further, in the IC socket 2, a switching bare chip connected with each terminal of the opposed surface by wires is arranged. The IC socket 2 is sandwiched between the LSI packages 1 and 3, and the respective terminals of each opposed surface are contacted with the opposed terminals of the LSI packages 1 and 3. The switching bare chip performs switching between the terminals of the LSI packages 1 and 3 via the terminals of the opposed surfaces. Thereby, a degree of freedom in wiring can be improved while achieving high integration. 【課題】複数の半導体パッケージの接続に関し、高集積化を図りつつ、配線自由度の向上を可能にする。【解決手段】ＩＣソケット２には、ＬＳＩパッケージ１、３と対向する対向面に、ＬＳＩパッケージ１上の複数の端子の配置に対応させた複数の端子が配置されている。更に、ＩＣソケット２には、対向面の各端子と配線接続されているスイッチング用ベアチップが配置されている。ＩＣソケット２は、ＬＳＩパッケージ１、３に挟み込まれ、各対向面の各端子が対向するＬＳＩパッケージ１、３の端子と接触し、スイッチング用ベアチップが、対向面の端子を介して、ＬＳＩパッケージ１、３の端子間でスイッチングを行う。これにより、高集積化を図りつつ、配線自由度の向上を可能にする【選択図】図１
Bibliography:Application Number: JP20130176116