SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a configuration shortening a clock tree in a semiconductor device that uses the Wide-IO technology.SOLUTION: A semiconductor device 80 includes a PLL circuit 81 and a plurality of memory controllers 83 to 86. The plurality of memory controllers 83 to 86 control a plu...

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Bibliographic Details
Main Authors MORI RYO, FUKUOKA KAZUKI
Format Patent
LanguageEnglish
Japanese
Published 16.02.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To provide a configuration shortening a clock tree in a semiconductor device that uses the Wide-IO technology.SOLUTION: A semiconductor device 80 includes a PLL circuit 81 and a plurality of memory controllers 83 to 86. The plurality of memory controllers 83 to 86 control a plurality of laminated memories. Around the PLL circuit 81, the plurality of memory controllers 83 to 86 are arranged. The position of the PLL circuit 81 is determined so as to make distances from the PLL circuit 81 to the plurality of memory controllers 83 to 86 identical to one another. 【課題】Ｗｉｄｅ ＩＯの技術を用いる半導体装置において、クロックツリーを短くする構成を提供する。【解決手段】半導体装置８０は、ＰＬＬ回路８１と複数のメモリコントローラ８３〜８６とを備える。複数のメモリコントローラ８３〜８６は、積層された複数のメモリを制御する。ＰＬＬ回路８１は、複数のメモリコントローラ８３〜８６が周囲に配置される。ＰＬＬ回路８１は、ＰＬＬ回路８１から複数のメモリコントローラ８３〜８６までの距離が同じになるように位置が決定される。【選択図】図１
Bibliography:Application Number: JP20130160306