DIGITAL SIGNAL PROCESSOR

PROBLEM TO BE SOLVED: To provide a digital signal processor utilizing a variable length instruction set in a digital signal circuit to process telephone calls.SOLUTION: A DSP includes a set of three data buses 108, 110, 112 over which data may be exchanged with a register bank 120 and three data mem...

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Bibliographic Details
Main Authors JIAN LIN, KANTAK PRASHANT A, SIH GILBERT C, LEE WAY-SHING, ZOU QUIZHEN, ZHANG HAITAO, MOTIWALA QUAEED, ZHANG LI, SAKAMAKI CHARLES E, JHA SANJAY K, JOHN DEEPU, KANG INYUP
Format Patent
LanguageEnglish
Japanese
Published 12.02.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To provide a digital signal processor utilizing a variable length instruction set in a digital signal circuit to process telephone calls.SOLUTION: A DSP includes a set of three data buses 108, 110, 112 over which data may be exchanged with a register bank 120 and three data memories 102, 103, 104. The register bank 120 has registers accessible by at least two processing units 128, 130. An instruction fetch unit 156 receives instructions of variable length stored in an instruction memory 152. The instruction memory 152 is separate from the set of three data memories 102, 103, 104. 【課題】通話を処理するデジタル信号回路において、可変長命令セットを利用するデジタル信号プロセッサを提供する。【解決手段】ＤＳＰは３つのデータバスの組１０８，１１０，１１２を含み、データはレジスタバンク１２０と３つのデータメモリ１０２，１０３，１０４と交換できる。レジスタバンク１２０は、少なくとも二つのプロセスユニット１２８，１３０によりアクセス可能なレジスタを有する。命令フェッチユニット１５６は、命令メモリ１５２中に格納される可変長の命令を受信する。命令メモリ１５２は３つのデータメモリ１０２，１０３，１０４の組から離されている。【選択図】図２
Bibliography:Application Number: JP20140181387