SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To solve such a problem that when a voltage, or the like, is applied to a first terminal 414 for the purpose of disconnecting a fuse 412, an unintended short circuit path (short migration path) may be formed from the fuse 412 to a silicon substrate 402, and thereby degradation...
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Main Author | |
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Format | Patent |
Language | English Japanese |
Published |
19.01.2015
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To solve such a problem that when a voltage, or the like, is applied to a first terminal 414 for the purpose of disconnecting a fuse 412, an unintended short circuit path (short migration path) may be formed from the fuse 412 to a silicon substrate 402, and thereby degradation due to voltage or current stress is concerned in a passive element, e.g., a fuse, contact fuse of polysilicon, or a polysilicon resistor near the substrate.SOLUTION: A semiconductor device includes a substrate on which a well layer or an isolation layer is formed, an insulation layer formed on the well layer or isolation layer on the substrate, and a passive element formed on the insulation layer.
【課題】フューズ412を断線させる目的で第1端子414に電圧等を印加すると、フューズ412からシリコン基板402への意図しない短絡経路(ショートマイグレーションパス)が形成されることがあった。このため、ポリシリコンのフューズ、コンタクトフューズ、又は、ポリシリコン抵抗のような基板に近い受動素子における電圧又は電流ストレスによる劣化が懸念されていた。【解決手段】ウエル層またはアイソレーション層が形成された基板と、基板のウエル層またはアイソレーション層上に形成された絶縁層と、絶縁層上に形成された受動素子とを備えることを特徴とする半導体装置を提供する。【選択図】図1 |
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Bibliography: | Application Number: JP20130138767 |