CIRCUIT BOARD INSPECTION METHOD AND CIRCUIT BOARD INSPECTION DEVICE

• Main Authors: KOTANI KAZUYA, FUKAYA YOSHIYUKI, AMANO MASAFUMI
• Format: Patent
• Language: English; Japanese
• Published: 05.01.2015
• Subjects: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES; MEASURING; PHYSICS; TESTING

PROBLEM TO BE SOLVED: To provide a circuit board inspection method and a circuit board inspection device for improved accuracy of determination over a conventional technique by reducing the effect of a positional change of silk print on the circuit board and of the formation errors such as flaws and traces caused on the circuit board.SOLUTION: Provided is a circuit board inspection method for inspecting, in a circuit board production process (circuit board production line 1) in which a solder in paste form is printed on a circuit board and an electronic component is mounted thereon, at least one of a printed state of the solder in paste form, a mounted state of the electronic component, and a state of inclusion of foreign matter on the circuit board. In the method, a range on an inspection circuit board to be inspected (inspection circuit board image Ft1 prior to printing) in which there is the occurrence of a formation error with respect to a sample circuit board (sample circuit board image Fm1 prior to printing) constituting a criterion is defined as an inspection exclusion area (Ae1 or Ae2), with the inspection exclusion area (Ae1 or Ae2) excluded from an inspection area (inspection image Gt2) of the inspection circuit board, before prescribed inspection is performed. 【課題】基板のシルク印刷の位置変化や基板に生じた傷、痕跡などの形成誤差の影響を軽減して、従来よりも判定精度を向上した基板検査方法および基板検査装置を提供する。【解決手段】基板にペースト状半田を印刷して電子部品を装着する基板生産工程（基板生産ライン１）で、ペースト状半田の印刷状態、電子部品の装着状態、および基板上への異物の混入状態のうち少なくとも一状態を検査する基板検査方法であって、基準となる見本基板（印刷前見本基板画像Ｆｍ１）に対して検査対象となる検査基板（印刷前検査基板画像Ｆｔ１）で形成誤差が生じている範囲を検査除外領域（Ａｅ１またはＡｅ２）とし、検査基板の検査領域（検査画像Ｇｔ２）から検査除外領域（Ａｅ１またはＡｅ２）を除外して所定の検査を行う。【選択図】図８