OFFSET CANCELLATION CIRCUIT AND SIGNAL DETECTION CIRCUIT USING THE CIRCUIT
PROBLEM TO BE SOLVED: To provide an offset cancellation circuit for, in response to the input of an analog signal from an input circuit, generating an output signal with a predetermined gain which reduces an error in the output signal due to its own circuit configuration, and a signal detection circ...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
15.12.2014
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide an offset cancellation circuit for, in response to the input of an analog signal from an input circuit, generating an output signal with a predetermined gain which reduces an error in the output signal due to its own circuit configuration, and a signal detection circuit using the circuit.SOLUTION: One end of a capacitive element 11 is connected to a feedback path and the other end is connected to a first junction 18 dividing a voltage between a terminal fed with an analog potential (V1) and a predetermined potential, so that the capacitive element is charged with a potential depending on a total offset voltage, and after that, the one end of the capacitive element 11 is connected to an inverting input terminal 10a and the other end is connected to a second junction 18 dividing a voltage between the terminal fed with the analog potential and an output terminal 10c of an amplification circuit 10, so that only an amplified voltage depending on the analog potential is produced from the output terminal.
【課題】 入力回路からのアナログ信号が入力され、所定のゲインで出力信号を生成する回路であって、自己の回路構成に起因する出力信号の誤差を低減するオフセットキャンセル回路及びこの回路を用いた信号検出回路を提供する。【解決手段】容量素子11の一端を帰還経路に接続し他端をアナログ電位(V1)が入力される端子と所定電位との間で分圧された第1の接続点18に接続して全オフセット電圧に応じた電位をこの容量素子にチャージし、その後、容量素子11の一端を反転入力端子10aに接続し他端をアナログ電位が入力される端子と増幅回路10の出力端子10cとの間で分圧される第2の接続点18に接続してアナログ電位に応じた増幅電圧のみを出力端子から得る。【選択図】 図1 |
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Bibliography: | Application Number: JP20130114642 |