SEMICONDUCTOR DEVICE

• Main Authors: FUJIKAWA SAISHI, HOSOYA KUNIO
• Format: Patent
• Language: English; Japanese
• Published: 04.12.2014
• Subjects: ADVERTISING; BASIC ELECTRIC ELEMENTS; CRYPTOGRAPHY; DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING; DISPLAY; DISPLAYING; EDUCATION; ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; FREQUENCY-CHANGING; LABELS OR NAME-PLATES; NON-LINEAR OPTICS; OPTICAL ANALOGUE/DIGITAL CONVERTERS; OPTICAL LOGIC ELEMENTS; OPTICS; PHYSICS; SEALS; SEMICONDUCTOR DEVICES; SIGNS; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF

PROBLEM TO BE SOLVED: To solve the problem of having an impact on a TFT and a crack occurence when a pressure is applied during the bonding of a pair of substrates caused by arranging a columnar spacer in an area overlapped with the TFT.SOLUTION: A dummy layer consisting of an inorganic material is formed below a columnar spacer formed in a position overlapped with a TFT. The dummy layer is arranged in the position overlapped with the TFT, so that a pressure applied to the TFT in a process of bonding a pair of substrates is distributed and relieved. The dummy layer is preferably formed from the same material as a pixel electrode because it is formed without increasing the number of processes. 【課題】ＴＦＴと重なる領域に柱状スペーサを配置すると、一対の基板の貼り合わせ時に圧力がかかり、ＴＦＴに影響を与える恐れ、クラックが発生する恐れなどがある。【解決手段】ＴＦＴと重なる位置に形成される柱状スペーサの下方に無機材料からなるダミー層を形成する。このダミー層をＴＦＴと重なる位置に配置することによって、一対の基板の貼り合わせ工程時にＴＦＴにかかる圧力を分散し、緩和する。このダミー層は、工程数を増やすことなく形成するため、画素電極と同じ材料で形成することが望ましい。【選択図】図１