PARALLELISM ADJUSTMENT DEVICE AND PARALLELISM ADJUSTMENT METHOD

• Main Authors: KAMBARA MASAO, AKAHORI SHIGETO
• Format: Patent
• Language: English; Japanese
• Published: 20.11.2014
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; SEMICONDUCTOR DEVICES; TESTING

PROBLEM TO BE SOLVED: To provide a parallelism adjustment device and a parallelism adjustment method adjusting parallelism between a semiconductor surface and an electrode surface while reducing load to a semiconductor, and increasing operating speed to achieve shorter cycle time.SOLUTION: A probe device 1 for adjusting parallelism between a surface 100f of a power semiconductor 100 and a surface 21f of a contactor 21 of a contact body 2 applying a current to the power semiconductor 100 while contacting the surface 100f, includes a pressure body assembly 3 pressing the contact body 2 at a predetermined pressing force until the surface 100f of the power semiconductor 100 contacts the surface 21f of the contactor 21 of the contact body 2, and thereafter pressing the contact body 2 at a stronger pressing force than the predetermined pressing force. 【課題】半導体に対する負荷を軽減して半導体の表面と電極の表面との平行度を調整し、稼動速度を高速化してサイクルタイムを短縮する平行度調整装置および平行度調整方法を提供する。【解決手段】パワー半導体１００の表面１００ｆと当該表面１００ｆに接触して加圧しつつ電流を印加する接触体２の接触部２１の表面２１ｆとの平行度を調整するプローブ装置１であって、パワー半導体１００の表面１００ｆと接触体２の接触部２１の表面２１ｆとが接触して平行度を調整するまで接触体２を所定の押圧力にて押圧し、その後に接触体２を所定の押圧力よりも大きい押圧力にて押圧する押圧体アッセンブリ３を備えた。【選択図】図２