NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD THEREFOR

PROBLEM TO BE SOLVED: To execute an accurate set operation, a reset operation or a read operation without generating current disturbance based on residual charge.SOLUTION: This nonvolatile semiconductor storage device comprises a memory cell array that includes a plurality of bit lines, a plurality...

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Bibliographic Details
Main Author SONEHARA TAKASHI
Format Patent
LanguageEnglish
Japanese
Published 17.11.2014
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Summary:PROBLEM TO BE SOLVED: To execute an accurate set operation, a reset operation or a read operation without generating current disturbance based on residual charge.SOLUTION: This nonvolatile semiconductor storage device comprises a memory cell array that includes a plurality of bit lines, a plurality of word lines crossing the plurality of bit lines, and memory cells provided at intersections between the plurality of bit lines and the plurality of word lines; and also comprises a controller controlling voltages applied to the bit lines and the word lines. Each memory cell includes a variable resistive element and a rectifier. The controller applies a first potential different to a selected memory cell via a selected bit line and a selected word line, and then applies a second potential different for eliminating residual charge to the selected memory cell via the selected bit line and the selected word line. 【課題】残留電荷に基づく電流のディスターブが生じず、正確なセット動作、リセット動作又はリード動作を実行する。【解決手段】この不揮発性半導体記憶装置は、複数のビット線と、複数のビット線に交差する複数のワード線と、複数のビット線及び複数のワード線の交差部に設けられたメモリセルとを有するメモリセルアレイを備え、更に、ビット線及びワード線に印加する電圧を制御する制御部を備える。メモリセルは、可変抵抗素子と整流素子とを含む。制御部は、選択メモリセルに対し、選択ビット線及び選択ワード線を介して第1電位差を与え、その後、選択メモリセルに対し、選択ビット線及び選択ワード線を介して残留電荷を消去する第2電電位差を与える。【選択図】図1
Bibliography:Application Number: JP20140020983