MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device.SOLUTION: In a semiconductor device 1, a semiconductor chip 8 mounted on a major surface of a package substrate 2 is sealed by a sealing member 11. On the major surface and a rear surface of the package substrate 2, wiring co...

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Main Authors MATSUURA TAKAO, IMURA KENICHI, TSUCHIYA KOJI, HASHIZUME TAKANORI, SUZUKI KAZUNARI, MIWA TAKASHI, ICHITANI MASAHIRO, SUZUKI MASAYUKI, TAKAHASHI NORIYUKI, NISHIDA TAKAFUMI
Format Patent
LanguageEnglish
Japanese
Published 30.10.2014
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Summary:PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device.SOLUTION: In a semiconductor device 1, a semiconductor chip 8 mounted on a major surface of a package substrate 2 is sealed by a sealing member 11. On the major surface and a rear surface of the package substrate 2, wiring conductor patterns 4 are disposed and dummy conductor patterns 4 are also disposed in regions where the wiring conductor patterns 4 are not formed. Increasing the density of the conductor patterns 4 in the package substrate 2 in the above described manner reduces warpage and swell of the package substrate 2 which are caused by thermal treatment in the manufacturing processes of the semiconductor device 1. 【課題】半導体装置の信頼性を向上させる。【解決手段】パッケージ基板2の主面上に実装された半導体チップ8を封止部材11によって封止した構成を持つ半導体装置1において、パッケージ基板2の主面および裏面に、配線用の導体パターン4を配置した他に、その配線用の導体パターン4が配置されていない領域にダミー用の導体パターン4とを配置した。このようにパッケージ基板2における導体パターン4の密度を高めることにより、半導体装置1の製造工程中の熱処理によるパッケージ基板2の反りやうねり等を低減することができる。【選択図】図2
Bibliography:Application Number: JP20140134944