CONTROL DEVICE, FIRST CONTROL DEVICE, SECOND CONTROL DEVICE, AND IMAGE FORMATION DEVICE

PROBLEM TO BE SOLVED: To secure performance equivalent to the conventional art without using a transmission path with a higher speed than necessary in a case where a main controller and a device controller are connected with each other via a transmission path to control each device, and to eliminate...

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Bibliographic Details
Main Authors YOSHIDA KINICHI, MITOBE YASUAKI, YAMAGISHI SHIGEKAZU
Format Patent
LanguageEnglish
Japanese
Published 16.10.2014
Subjects
CINEMATOGRAPHY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
ELECTROGRAPHY
ELECTROPHOTOGRAPHY
HOLOGRAPHY
MAGNETOGRAPHY
PHOTOGRAPHY
PHYSICS
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Summary:PROBLEM TO BE SOLVED: To secure performance equivalent to the conventional art without using a transmission path with a higher speed than necessary in a case where a main controller and a device controller are connected with each other via a transmission path to control each device, and to eliminate needs for increase in signal lines configuring the transmission path and reconstruction of the main controller even when there is a change of a device connected to the device controller.SOLUTION: In a control device 11, a main controller 12 having a CPU 20 and a duplication register group 24, and a device controller 14 to which at least one device is connected and which has an input-output control register group 32 storing data for controlling the drive of the device and data indicating a state of the device, are connected with each other via a full-duplex system serial bus 40. The control device 11 performs duplication processing of reading each data stored in the input-output control register group 32 and transferring via the serial bus 40 to write in the duplication register group 24, at a cycle equal to or shorter than a count cycle of a system timer that becomes a reference for an operation of the CPU 20. 【課題】主制御部と機器制御部とを伝送路を介して接続して各機器を制御する場合において、必要以上に高速な伝送路を用いなくても従来と同等の性能を確保でき、機器制御部に接続される機器の変更があっても、上記伝送路を構成する信号線の増加及び主制御部の作り替えを不要とする。【解決手段】制御装置１１では、ＣＰＵ２０及び複写レジスタ群２４を備えた主制御部１２と、少なくとも１つの機器が接続され、前記機器の駆動を制御するデータ及び前記機器の状態を示すデータの各々が記憶される入出力制御レジスタ群３２を備えた機器制御部１４と、が全二重方式のシリアルバス４０を介して接続されている。制御装置１１では、ＣＰＵ２０の動作の基準となるシステムタイマのカウント周期以下の周期で、入出力制御レジスタ群３２に記憶された各データを読出してシリアルバス４０を介して転送し複写レジスタ群２４に書込む複写処理が行なわれる。【選択図】図１
Bibliography:Application Number: JP20140139607