SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To enhance the degree-of-freedom of wiring for connecting a memory chip and a controller chip, in a semiconductor device including a package structure where the memory chip and controller chip are laminated on a wiring board.SOLUTION: A memory card 1A includes a wiring board 2...

Full description

Saved in:
Bibliographic Details
Main Authors SHINOHARA MINORU, ARAKI MAKOTO, SUGIYAMA MICHIAKI
Format Patent
LanguageEnglish
Published 31.07.2014
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PROBLEM TO BE SOLVED: To enhance the degree-of-freedom of wiring for connecting a memory chip and a controller chip, in a semiconductor device including a package structure where the memory chip and controller chip are laminated on a wiring board.SOLUTION: A memory card 1A includes a wiring board 2 and four memory chips M1-M4 laminated on the principal surface thereof, and a controller chip 3 and an interposer 4 mounted on the surface of the memory chip M4 of the uppermost layer. The memory chips M1-M4 are laminated, respectively, on the surface of the wiring board 2 while directing the long side in the same direction as that of the long side of the wiring board 2. The memory chip M1 of the lowermost layer is mounted on the wiring board 2 while being shifted by a predetermined distance in the tip direction of the memory card 1A so that it does not overlap the pad 9 of the wiring board 2. Three memory chips M2-M4 laminated on the memory chip M1 are arranged so that the short side on the side where a pad 6 is formed is located at the tip of the memory card 1A.
Bibliography:Application Number: JP20140096674