SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To contribute to the acceleration of a reading speed by suppressing data inversion (data destruction) caused by an SNM failure during reading an SRAM cell.SOLUTION: A capacitor CG1 connected to a storage node NA of an SRAM cell 160 and a word line WL to have an electrostatic ca...

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Bibliographic Details
Main Author OBATA HIROYUKI
Format Patent
LanguageEnglish
Published 20.01.2014
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To contribute to the acceleration of a reading speed by suppressing data inversion (data destruction) caused by an SNM failure during reading an SRAM cell.SOLUTION: A capacitor CG1 connected to a storage node NA of an SRAM cell 160 and a word line WL to have an electrostatic capacitance between the storage node NA and the word line WL is provided. The capacitor CG1 relatively has a first electrostatic capacitance CL in the case that the word line WL is in a non-selection state (normally low level) and the storage node NA holds a high level, and has a second electrostatic capacitance CS smaller than the first electrostatic capacitance CL in the case that the word line WL is in a non-selection state (normally low level) and the storage node NA holds a low level.
Bibliography:Application Number: JP20120149505