SOLID STATE IMAGING ELEMENT

PROBLEM TO BE SOLVED: To achieve downsizing of a pixel and global exposure, and further a high-speed frame rate in a solid state imaging element performing avalanche multiplication for charge multiplication.SOLUTION: A solid state imaging element comprises in a surface layer of a semiconductor subst...

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Bibliographic Details
Main Authors TATENO YOSHIHIDE, YOGO YUKIAKI
Format Patent
LanguageEnglish
Published 09.12.2013
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Summary:PROBLEM TO BE SOLVED: To achieve downsizing of a pixel and global exposure, and further a high-speed frame rate in a solid state imaging element performing avalanche multiplication for charge multiplication.SOLUTION: A solid state imaging element comprises in a surface layer of a semiconductor substrate: a photoelectric conversion part; a charge storage part for converting a charge to a voltage; a first multiplication part and a second multiplication part which are formed at a distance from the photoelectric conversion part and the charge storage part for multiplying charges generated by the photoelectric conversion part; a transfer part adjacent to the photoelectric conversion part and the first multiplication part; and a read-out transfer part adjacent to the second multiplication part and the charge storage part. The solid state imaging element comprises: gates formed on the semiconductor substrate on each part via an insulation film; and a charge barrier part in the surface layer of the semiconductor substrate between the first multiplication part and the second multiplication part. An impurity concentration of the charge barrier part is higher than an impurity concentration of each of the first multiplication part and the second multiplication part.
Bibliography:Application Number: JP20120121115