METHOD AND APPARATUS FOR GENERATING OR UTILIZING ONE OR MORE CYCLE-SWALLOWED CLOCK SIGNALS
PROBLEM TO BE SOLVED: To provide an electronic device for generating or utilizing one or more cycle-swallowed clock signals derived based on one or more first clock signals.SOLUTION: The device includes a module configured to receive a first clock signal 320 having a first frequency. The module is c...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
05.12.2013
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide an electronic device for generating or utilizing one or more cycle-swallowed clock signals derived based on one or more first clock signals.SOLUTION: The device includes a module configured to receive a first clock signal 320 having a first frequency. The module is configured to generate a second clock signal 330 having a second frequency and configured to swallow one or more clock cycles of the first clock signal 320 in generating the second clock signal 330. The first clock signal 320 has even cycles, and the second clock signal has uneven cycles. The first frequency 320 is greater than the second frequency 330. |
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Bibliography: | Application Number: JP20130128457 |