WIRING BOARD

PROBLEM TO BE SOLVED: To provide a wiring board which can reduce warp occurring in the wiring board by efficiently inhibiting decrease in intensity of a core material.SOLUTION: A wiring board according to an embodiment is a wiring board on which a semiconductor chip is mounted, and comprises: a core...

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Bibliographic Details
Main Authors SUZUKI KENJI, HIDA TOSHINORI
Format Patent
LanguageEnglish
Published 20.06.2013
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Summary:PROBLEM TO BE SOLVED: To provide a wiring board which can reduce warp occurring in the wiring board by efficiently inhibiting decrease in intensity of a core material.SOLUTION: A wiring board according to an embodiment is a wiring board on which a semiconductor chip is mounted, and comprises: a core material having a first principal surface and a second principal surface opposed to the first principal surface and in which a plurality of open holes penetrating from the first principal surface to the second principal surface are formed; a plurality of resin members filled in the plurality of open holes, respectively; a plurality of through holes formed in the plurality of resin members, respectively; and a plurality of through hole conductors formed on inner peripheral surfaces of the plurality of through holes, respectively and connected to a signal line, a power line and a ground line of the semiconductor chip. The through hole conductor connected to the signal line is formed in a region other than a mounting region of the semiconductor chip.
Bibliography:Application Number: JP20110270277