NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To accurately perform reading operation.SOLUTION: When performing reading operation of memory transistors, a controlling circuit applies a first voltage to a selected word line connected to a selected memory transistor. The controlling circuit applies second voltages that bring...

Full description

Saved in:
Bibliographic Details
Main Authors SAKAGUCHI NATSUKI, MAEJIMA HIROSHI
Format Patent
LanguageEnglish
Published 07.01.2013
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PROBLEM TO BE SOLVED: To accurately perform reading operation.SOLUTION: When performing reading operation of memory transistors, a controlling circuit applies a first voltage to a selected word line connected to a selected memory transistor. The controlling circuit applies second voltages that bring the memory transistors into conduction regardless of data held by the memory transistors to non-selected word lines connected to non-selected memory transistors excluding the selected memory transistor. The controlling circuit applies third voltages to bit lines. The controlling circuit applies a fourth voltage smaller than the third voltages to a selected source line connected to a memory string in which the selected memory transistor in a selected memory block is included out of source lines. The controlling circuit applies fifth voltages that are substantially the same as the third voltages to non-selected source lines to which non-selected memory strings are connected in the selected memory block out of the source lines.
Bibliography:Application Number: JP20110131776