INFORMATION PROCESSOR

PROBLEM TO BE SOLVED: To suppress the occurrence of deficiency in system performance and deficiency in a hardware resource.SOLUTION: An information processor 100 includes a plurality of masters 101 executing a plurality of applications, a slave 102, and a system bus 104 connecting the plurality of m...

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Bibliographic Details
Main Author MURATA HIROYUKI
Format Patent
LanguageEnglish
Published 07.06.2012
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To suppress the occurrence of deficiency in system performance and deficiency in a hardware resource.SOLUTION: An information processor 100 includes a plurality of masters 101 executing a plurality of applications, a slave 102, and a system bus 104 connecting the plurality of masters 101 and the slave 102. At least one of the plurality of applications is executed by two or more masters in the plurality of masters 101, and the information processor 100 controls a data transfer amount for each of the plurality of applications which are to be transferred via the system bus 104 by referring to an ASID 127 included in an access request and response data.
Bibliography:Application Number: JP20100255278