FERROELECTRIC MEMORY

PROBLEM TO BE SOLVED: To provide a ferroelectric memory with which an increase in a chip surface area can be suppressed and, at the same time, a signal amount of a memory cell can be grasped in a short time.SOLUTION: A ferroelectric memory according to the present invention has memory cell blocks MB...

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Bibliographic Details
Main Authors DOMAE SUMIKO, TAKASHIMA DAIZABURO
Format Patent
LanguageEnglish
Published 23.02.2012
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To provide a ferroelectric memory with which an increase in a chip surface area can be suppressed and, at the same time, a signal amount of a memory cell can be grasped in a short time.SOLUTION: A ferroelectric memory according to the present invention has memory cell blocks MB0 to MB7 having ferroelectric capacitors, a first bit line group /BL0-/BL3 and a second bit line group BL0-BL3 from which data of MB0 to MB7 are read out, and a reference potential generation circuit 11 for generating reference potential by shorting BL0-L3 based on a control signal B every time the data from MB0 to MB3 are read out to /BL0-/BL3.
Bibliography:Application Number: JP20100179834