SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To control the threshold voltage of a p-type MOS transistor.SOLUTION: A first insulating layer 6 is formed on a silicon substrate 1. Next, a high dielectric-constant film 7 and a metal-deficient-type oxide film 9 are sequentially formed on the first insulating layer 6. After th...

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Bibliographic Details
Main Author HANEDA MASAKI
Format Patent
LanguageEnglish
Published 09.02.2012
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To control the threshold voltage of a p-type MOS transistor.SOLUTION: A first insulating layer 6 is formed on a silicon substrate 1. Next, a high dielectric-constant film 7 and a metal-deficient-type oxide film 9 are sequentially formed on the first insulating layer 6. After that, a second insulating layer 10, which has a mixed layer 10A in which at least a part of the high dielectric-constant film 7 and the metal-deficient-type oxide film 9 is diffused, is formed by heat treatment. Furthermore, a conductive film 11 is formed on the second insulating layer 10, and then a gate electrode 21 is formed by dry etching. Source/drain regions 24 are formed both sides of the gate electrode 21, and then activation annealing is performed.
Bibliography:Application Number: JP20100168068