SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of monitoring characteristics of a transistor of an optional position in a chip.SOLUTION: Test circuits 13-1, 13-2 are arranged in a region in the neighborhood of functional blocks 12-1 to 12-n including a plurality of the t...

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Bibliographic Details
Main Author KUSHIYAMA NATSUKI
Format Patent
LanguageEnglish
Published 06.10.2011
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of monitoring characteristics of a transistor of an optional position in a chip.SOLUTION: Test circuits 13-1, 13-2 are arranged in a region in the neighborhood of functional blocks 12-1 to 12-n including a plurality of the transistors and include a first flip flop circuit 13a, a second flip flop circuit 13b, and at least one inverter circuit 21, 31, 41 connected between the first and second flip flop circuits. A signal generation circuit 14 generates a clock pulse including a first clock pulse and a second clock pulse, and can control pulse intervals of the first and second clock pulses. In a test, the first flip flop circuit is synchronized with the first clock pulse of the signal generation circuit to output data. The second flip flop circuit is synchronized with the second clock pulse of the signal generation circuit to latch the data.
Bibliography:Application Number: JP20100064739