SEMICONDUCTOR DEVICE INCLUDING MOS TRANSISTOR HAVING OPTIMIZED CHANNEL REGION

• Main Authors: KIM WEON-HONG, JOO DAE-KWON, CHUNG HOI SUNG, KIM MYUNG-SUN, SONG MOONKYUN, DO JINHO, LIM HAJIN
• Format: Patent
• Language: English
• Published: 28.07.2011
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a semiconductor device including a MOS transistor. SOLUTION: The semiconductor device includes a device isolation layer arranged on a predetermined region of a semiconductor substrate to define active regions. A first active region 9a and a second active region 9b include central top surfaces 9t of a (100) crystal plane and inclined edge surfaces 9e extending from the central top surfaces 9t to the device isolation layer 14. The central top surfaces 9t and the inclined edge surfaces 9e of the first active region 9a and the second active region 9b are covered with a first semiconductor pattern 15a and a second semiconductor pattern 15b. The first semiconductor pattern 15a and the second semiconductor pattern 15b include flat top surfaces 15t of a (100) crystal plane that are parallel with the central top surfaces 9t, and sidewalls 15s that are substantially perpendicular to the flat top surfaces. A gate pattern 26a and a second gate pattern 26b are disposed in a direction of crossing the sidewalls passing through the upper part of the first semiconductor pattern 15a and the second semiconductor pattern 15b. COPYRIGHT: (C)2011,JPO&INPIT