NONVOLATILE MEMORY TEST METHOD AND MEMORY TEST DEVICE

PROBLEM TO BE SOLVED: To provide a nonvolatile memory test method and a memory test device capable of giving stress to a reading circuit as well as to a data holding part. SOLUTION: The invention is the nonvolatile memory test method for testing the presence or absence of abnormality by the memory t...

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Bibliographic Details
Main Authors KANEDA HIROYUKI, WATABE YOJI, NAKAMURA MASARU
Format Patent
LanguageEnglish
Published 24.03.2011
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Summary:PROBLEM TO BE SOLVED: To provide a nonvolatile memory test method and a memory test device capable of giving stress to a reading circuit as well as to a data holding part. SOLUTION: The invention is the nonvolatile memory test method for testing the presence or absence of abnormality by the memory test device based on the data read out by a reading circuit concerning a nonvolatile memory having a data holding part for holding data for each address, the reading circuit for reading the data held for each address, and an internal buffer for one page. The data held at one address in one page is sequentially read out by the reading circuit in the order of pages. COPYRIGHT: (C)2011,JPO&INPIT
Bibliography:Application Number: JP20090210219