SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor memory device for determining a genuine operational speed of an inverter which constitutes an oscillation circuit. SOLUTION: The semiconductor memory device is equipped with: a memory block including a plurality of word lines, a plurality of bit lines...

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Bibliographic Details
Main Author MORINO MAKOTO
Format Patent
LanguageEnglish
Published 01.07.2010
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor memory device for determining a genuine operational speed of an inverter which constitutes an oscillation circuit. SOLUTION: The semiconductor memory device is equipped with: a memory block including a plurality of word lines, a plurality of bit lines and a plurality of memory cells; an oscillation circuit with a delay speed adjustment circuit to be controlled based on a test signal added thereto; and an access control circuit for sequentially accessing the plurality of memory cells based on an output of the oscillation circuit in refresh mode. The oscillation circuit oscillates at a first frequency by enabling the delay speed adjustment circuit when no test signal is input and oscillates at a second frequency shorter than the first frequency by disabling the delay speed adjustment circuit when the test signal is input. COPYRIGHT: (C)2010,JPO&INPIT
Bibliography:Application Number: JP20080324991