INTEGRATED CIRCUIT SUBSTRATE AND MULTI-CHIP INTEGRATED CIRCUIT ELEMENT PACKAGE

PROBLEM TO BE SOLVED: To provide an integrated circuit substrate capable of relatively improving electric resistance and signal delay and employing a bond finger; and an integrated circuit element package. SOLUTION: This integrated circuit substrate includes an integrated circuit chip having a plura...

Full description

Saved in:
Bibliographic Details
Main Authors KIM TAE HEON, SHIN MU-SEOB, YOON TAE-SUNG, HONG MIN-GI, KIN SHIN
Format Patent
LanguageEnglish
Published 10.06.2010
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PROBLEM TO BE SOLVED: To provide an integrated circuit substrate capable of relatively improving electric resistance and signal delay and employing a bond finger; and an integrated circuit element package. SOLUTION: This integrated circuit substrate includes an integrated circuit chip having a plurality of conductive pads on a surface thereof and a printed circuit board mounted with the integrated circuit chip. The printed circuit board includes a plurality of alternately arranged first and second conductive bond fingers having first and second heights different from each other corresponding to the plurality of conductive pads, and a plurality of first insulating supports 112 supporting the first conductive bond fingers 114 to have relatively large heights relative to the second conductive bond fingers 113. In addition, the integrated circuit substrate includes: a plurality of first electric connection bodies for respectively electrically connecting a plurality of first conductive pads in the plurality of conductive pads to the corresponding first conductive bond fingers, and a plurality of second electric connection bodies for respectively electrically connecting a plurality of second conductive pads in the plurality of conductive pads to the corresponding second conductive bond fingers. COPYRIGHT: (C)2010,JPO&INPIT
Bibliography:Application Number: JP20090236114