SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS

PROBLEM TO BE SOLVED: To provide a technique that maintains the homogeneity of semiconductor devices and interconnection which are subjected to advanced microfabrication while maintaining the mounting rate of circuit cells onto a chip. SOLUTION: The gate electrodes 4 of an n-channel MISFET Qn2 and a...

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Bibliographic Details
Main Author SHIMIZU YOJI
Format Patent
LanguageEnglish
Published 25.03.2010
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To provide a technique that maintains the homogeneity of semiconductor devices and interconnection which are subjected to advanced microfabrication while maintaining the mounting rate of circuit cells onto a chip. SOLUTION: The gate electrodes 4 of an n-channel MISFET Qn2 and an n-channel MISFET Qn3 forming an NAND circuit cell have the same node, and are turned on/off simultaneously according to the same input signal. The n-channel MISFET Qn2 and n-channel MISFET Qn3 are arranged adjacently to each other and electrically connected in series. The gate electrodes 4 of a p-channel MISFET Qp3 and a p-channel MISFET Qp4 forming an NAND circuit cell have the same node, and are turned on/off simultaneously according to the same input signal. The p-channel MISFET Qp3 and p-channel MISFET Qp4 are arranged adjacently to each other and electrically connected in series. COPYRIGHT: (C)2010,JPO&INPIT
Bibliography:Application Number: JP20080230628